• wjrii@lemmy.world
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        12日前

        Then it’s a good thing the gang of four there are all 1.25u!

        Which is not to say your decision is anything other than ourageous and unfair. We’ll see what the Supreme Chancellor thinks.

      • wjrii@lemmy.world
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        12日前

        Very cool. I think your bottom row may ultimately prove slightly more user friendly than mine, though I certainly got used to it. The ortholinear number row has proven to be a non-issue for me, though I have the “advantage” of not truly touch typing, and my hand-eye coordination therefore doesn’t have too much trouble with losing that 0.5u stagger.

      • wjrii@lemmy.world
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        12日前

        DIY board. I designed a no-stabs matrix-only PCB (the Pi Pico MCU has to serve as the “daughterboard”). It’s FRL 1800 and is one of my personal favorites, though I’ve since replaced the black spacebars with a couple of BOW keys that reflect the hold-tap mapping I set up; I’ve also changed it from KMK to ZMK.

        Anyway, PCB orders usually have a minimum order of 5 pieces, so I snapped the numpad off of one and laser-cut a case of sorts, really just plates and spacers, and got “half-height” switches. My laser can sort of half-assedly dye-sub cheap PBT blanks, so I did a Timex Sinclair design. Later, I added feet, a 3D printed replacement one-piece spacer with a sidewall, and a MagSafe ring so it could be the keyboard for a Chrometab I converted to Debian.

          • wjrii@lemmy.world
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            11日前

            I mean, it helped that I knew the designer, LOL.

            IIRC, there is one single bodge wire in there from where I did compromise the matrix, but I cannot stress how simplistic this PCB design was. It is holes for switches, holes for diodes, holes to string it over to the microcontroller dev board, and traces connecting them all. My second one is slightly more ambitious, allowing a couple of layout choices, Alps or MX, and has a designated spot to solder a specific MCU. That one requires two bodge wires because I screwed up the traces a little. If I do a third, I will know to make sure every trace is assigned to a “subnet” before I tell KiCAD to clean things up.